Senior and Principal FPGA Engineers
Kforce Inc.

San Diego, California

Posted in Recruitment Consultancy


This job has expired.

Job Info


RESPONSIBILITIES:

A Kforce client is seeking to hire a Senior and Principal FPGA Engineers in San Diego, California (CA).Summary:The client is a growing and established nationwide Engineering Technology company is seeking a few Senior and Principal FPGA Engineers. We are working directly with the Hiring Managers on these search assignments. This position is partial remote.Responsibilities include:
  • Prepares design specifications, analyses, and recommendations
  • Prepares design and operation objectives, specifications, and resource needs
  • Senior and Principal FPGA Engineers recommends test control, strategies, apparatus, and equipment
  • Supports the interfaces with customers, contractors, and marketing vendors
  • Evaluates vendor capabilities to provide required products or services
  • Conducts in-house design reviews and technical meetings
  • Prepares design proposal to reflect cost, schedule, and technical approaches
  • Senior and Principal FPGA Engineers monitors project status and progress
  • Manages budget and schedule for electrical engineering tasks
  • Keeps abreast of improvements in electronic engineering techniques
  • Develop logic flowcharts and block diagrams
  • May provide technical direction and guidance to Design Engineers, Technicians, or Design Support personnel assigned to work on a common project


REQUIREMENTS:

  • Bachelor's degree in Electrical Engineering, Physics, Computer Engineering, or similar field; Master's degree preferred
  • 5-10+ years of VHDL design experience or more
  • 2+ years of Xilinx Tool experience or similar
  • Experience in FPGA design environments, including Xilinx, ISE, Vivado, etc.
  • Strong leadership and control of the work process from beginning to end is necessary
  • Experience with VHDL Signal Processing Implementation for communication systems or similar is highly desired
  • Signal processing engineering experience (DSP) is preferred
  • Designing circuits for communication systems is preferred
  • Experience with Filters, timing and recovery loops, channel, Modulator, and demodulator are preferred
  • Experience with EDK and MATLAB are plusses but not required
  • Knowledge of FPGA design environments, including Xilinx, ISE, Vivado, EDK, Modalism and MATLAB is a plus


The pay range is the lowest to highest compensation we reasonably in good faith believe we would pay at posting for this role. We may ultimately pay more or less than this range. Employee pay is based on factors like relevant education, qualifications, certifications, experience, skills, seniority, location, performance, union contract and business needs. This range may be modified in the future.

We offer comprehensive benefits including medical/dental/vision insurance, HSA, FSA, 401(k), and life, disability & ADD insurance to eligible employees. Salaried personnel receive paid time off. Hourly employees are not eligible for paid time off unless required by law. Hourly employees on a Service Contract Act project are eligible for paid sick leave.

Note: Pay is not considered compensation until it is earned, vested and determinable. The amount and availability of any compensation remains in Kforce's sole discretion unless and until paid and may be modified in its discretion consistent with the law.

This job is not eligible for bonuses, incentives or commissions.

Kforce is an Equal Opportunity/Affirmative Action Employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, pregnancy, sexual orientation, gender identity, national origin, age, protected veteran status, or disability status.




This job has expired.

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